This invention relates to a protective circuit for MOS integrated circuits. More particularly, for an integrated circuit having a P type substrate and vice versa for an integrated circuit having an N type substrate, this invention relates to a power-on reset circuit that will provide an output signal roughly equal to the power supply voltage unless the P substrate voltage has a sufficiently large negative voltage and that will reset its output voltage to the reference ground potential when the P substrate bias voltage has reached a sufficiently large negative voltage value.
A substrate bias voltage is used in many MOS circuits to back bias and thereby render non-conductive diodes and parasitic (field) transistors. However, when a circuit is first powered on, due to capacitive coupling to the substrate and due to inherent circuit delay in establishing the substrate bias voltage, the diodes and parasitic (field) transistors may, in fact, become forward biased and conducting for a time before the substrate back bias voltage has reached its normal operating value. The temporary forward biasing of the P substrate causes the threshold voltage of the MOS circuit transistors temporarily to drop to substantially lower values. Moreover the states of the input voltages of the various circuits are not yet finally defined. As a result of this and even more effectuated by the temporary lower threshold, large short circuit currents (for example through the output stages of push-pull circuits like buffers or clocks) could damage the integrated circuit or blow out the power supply fuse.
The output voltage of the protective circuit can be used firstly to inhibit the precharge of N+ areas during power on and thereby avoid forward biasing of the P substrate, and secondly to immediately define the input states of important and major circuits in order to prevent large short circuit currents through these circuits.